Clock Gate -?- Register [CLKGATECTLOVR](Default Value: 0xXXXXXXXX)ΒΆ

Offset: 0x000C Registername: CLKGATECTLOVR
Bit: R/W: Default/Hex Description
31:22 R/W 0x0 /
21:20 R/W 0x0 CLKGATECTLOVR_BIF_CORE_CLKO
19:18 R/W 0x0 CLKGATECTLOVR_TA_CLKO
17:16 R/W 0x0 CLKGATECTLOVR_IDXFIFO_CLKO
15:14 R/W 0x0 CLKGATECTLOVR_PDS_CLKO
13:12 R/W 0x0 CLKGATECTLOVR_VDM_CLKO
11:10 R/W 0x0 CLKGATECTLOVR_DPM_CLKO
9:8 R/W 0x0 CLKGATECTLOVR_MTE_CLKO
7:6 R/W 0x0 CLKGATECTLOVR_TE_CLKO
5:4 R/W 0x0 CLKGATECTLOVR_TSP_CLKO
3:2 R/W 0x0 CLKGATECTLOVR_ISP2_CLKO
1:0 R/W 0x0 CLKGATECTLOVR_ISP_CLKO